Project Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world.
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We're hiring a Digital Design Engineer within a high performance ASIC design team. This team is using industry leading methodologies to develop proprietary IP’s.

The Role:
Be part of Project Kuiper’s sub-team responsible for defining and implementing the digital chip SOCs for communications via Low Earth Orbit satellites and Amazon gateways. This is a unique opportunity to define a groundbreaking wireless solution with few legacy constraints. The team works with customer requirements and wireless system teams to define modems, high-speed interfaces, embedded processors, and DSP solutions in latest CMOS generation technologies.

In this role you will:
· Implement wireless system architecture in silicon from system specification to chip specification to RTL to optimizing timing / power to chip level validation.
· Develop solutions optimizing customer experience (throughput, latency, and availability) while meeting power and cost constraints.
· Drive high quality designs for first-time right silicon solutions, and meeting the power objectives
· Create standalone verification test bench to verify the correctness of your block.
· Work with the verification team and participate in System level verification using test benches constructed using UVM, System C and DPI-C.
· Ensure that the block meets DFT, timing and power targets by working closely with the implementation team.
· Learn about requirements and solutions for systems operating in space
· Drive trade-off analysis to benefit customer experience and optimization of resources (costs, power, spectrum).

Export Control Requirement:
Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.

Key job responsibilities
- Engage with architects and system engineers to drive hardware micro-architecture.

- Involve in control plane logic design and interfaces to bus fabrics.
- Explore and propose innovative ideas and work towards optimization of the modem.


. Bachelor's degree in Electrical / Communications Engineering or related field, or equivalent experience.
· 5+ years of experience in digital logic design, preferably in DSP or communication systems.
· Ability to convert DSP algorithms into RTL code and optimize for performance, power, and area.

. Master's or Ph.D degree in Electrical / Communications Engineering.
· 5+ years of experience in digital design, preferably in communication systems
· Familiarity with UVM and Matlab.
· Ability to write assertions and exposure to Formal verification


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